********************************
* Copyright:                   *
* Vishay Intertechnology, Inc. *
********************************
*30-Apr-2018
*ECN S18-0486, Rev. A
*File Name: Si7155DP_PS.txt and Si7155DP_PS.lib
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet. Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT Si7155DP D G S 
M1 3 GX S S PMOS W= 26342500u L= 0.30u 
M2 S GX S D NMOS W= 26342500u L= 0.38u 
R1 D 3 2.667e-03 TC=5.361e-03,1.808e-06
CGS GX S 6.061e-09 
CGD GX D 4.318e-10 
RG G GY 2 
RTCV 100 S 1e6 TC=7.055e-04,0.157e-05
ETCV GY GX 100 200 1 
ITCV S 100 1u 
VTCV 200 S 1 
DBD D S DBD 26342500u 
************************************************** 
.MODEL PMOS PMOS ( LEVEL = 3 TOX = 5e-8 
+ RS = 0 KP = 4.297e-06 NSUB = 3.760e+16 
+ KAPPA = 9.942e-02 NFS = 4.742e+11 
+ LD = 0 IS = 0 TPG = -1    )
************************************************** 
.MODEL NMOS NMOS ( LEVEL = 3 TOX = 5e-8 
+NSUB = 1.021e+16 IS = 0 TPG = -1    )
************************************************** 
.MODEL DBD D ( 
+FC = 0.1 TT = 1.145e-07 T_measured = 25 BV = 41
+RS = 4.743e-02 N = 1.011e+00 IS = 2.934e-13 
+EG = 1.175e+00 XTI = -2.831e-01 TRS1 = 6.351e-04
+CJO = 6.470e-10 VJ = 3.000e-01 M = 1.000e+00 ) 
.ENDS 
